{
    "schema_version": "via_ai_product_manager_jobs_v1",
    "data_type": "ai_product_manager_jobs",
    "job": {
        "job_title": "平头哥-模拟设计高级/资深专家（高速电芯片-光互联方向）-上海",
        "job_level": "专家",AI生成
        "work_category": "全职",AI生成
        "department": "阿里集团",
        "location": "上海",
        "work_mode": "未披露",AI生成
        "job_category": "技术-芯片"AI生成
    },
    "company": {
        "company_name": "平头哥",
        "company_industry": "半导体 / 芯片设计",
        "company_size": "未披露",
        "company_website": "alibaba.com",
        "company_description": "平头哥研发计算、存储及网络芯片，为人工智能基础设施提供支持。"
    },
    "compensation": {
        "salary_range": {
            "min": "",
            "max": "",
            "currency": "未披露",
            "cycle": "未披露"
        },
        "benefits": "未披露"
    },
    "requirements": {
        "working_years": 5,
        "degree": "博士",
        "language": "未披露",AI生成
        "visa_support": "未披露",
        "responsibilities": "The candidate will be the major interface to the optical IO analog/mixed signal design team or vendor. As a member of the analog team, you’ll collaborate with our architects and engineers to develop innovative high speed analog transceiver solutions for next-generation optical and wireline communication systems.\n* We are currently hiring for multiple levels for this role. Your level and compensation will be determined by your experience, education, and location.\n● Design analog/mixed-signal blocks with a focus on transceivers and broadband circuits interfacing with silicon photonics elements such as trans-impedance amplifiers (TIA) and Tx Driver\n● Contribute to the development of complex SoC integration flows, with a strong focus on high-speed circuit design and advanced node integration. You will work closely with photonics and 3DIC packaging teams to co-develop solutions for leading-edge products\n● Support micro-architecture development with chip architects by conducting feasibility studies\n● Collaborate with members of our design engineering teams (system, digital, analog, photonics) to define electrical requirements\n● Drive block-level floorplan, mask design views, and their reviews\n● Run post-layout and mixed-signal top-level simulations to validate integration\n● Define production and bench-level test plans\n● Validate performances of the circuits in the lab\n● Mentor junior design engineers",
        "requirements_text": "● Minimum MSEE with 8+ years or Ph.D. with 5+ years of relevant industry experience with a focus on optical or wireline transceiver design for 20+ Gbps NRZ and PAM applications\n● Experience designing Analog-Front-End blocks such as trans-impedance amplifiers (TIA) and Tx Driver\n● Experience interfacing with silicon photonic modulators (MZM, MRM)\n● Understanding of photonic devices: waveguides, couplers, photodetectors, electro-optic modulators, micro-ring resonators\n● Experience with Tx/Rx equalization techniques and circuits\n● Hands-on experience with 3D Electro-Magnetic (EM) simulation tools is required\n● Self-driven, excellent problem solving and analytical skills, good communication skills and a strong team player.\n● Local and international travel may be required.",
        "skills": [AI生成
            "沟通能力"
        ],
        "preferred_qualifications": "未披露",
        "job_highlights": "未披露"
    },
    "contact": {
        "recruiter_name": "未披露",
        "contact_methods": [
            {
                "type": "apply_link",
                "value": "https://recruitment.t-head.cn/off-campus/position-detail?positionId=100006020008"
            }
        ]
    },
    "posting": {
        "posting_id": "100006020008",
        "post_date": "2026-09-01",
        "hire_time": "未披露",
        "update_date": "20260917",
        "job_url": "https://recruitment.t-head.cn/off-campus/position-detail?positionId=100006020008"
    },
    "fulltext": "平头哥-模拟设计高级/资深专家（高速电芯片-光互联方向）-上海\n平头哥-模拟设计高级/资深专家（高速电芯片-光互联方向）-上海\n\n基础信息\n职位类别：技术-芯片\n工作地点：上海\n\n职位描述\nThe candidate will be the major interface to the optical IO analog/mixed signal design team or vendor. As a member of the analog team, you’ll collaborate with our architects and engineers to develop innovative high speed analog transceiver solutions for next-generation optical and wireline communication systems.\n* We are currently hiring for multiple levels for this role. Your level and compensation will be determined by your experience, education, and location.\n● Design analog/mixed-signal blocks with a focus on transceivers and broadband circuits interfacing with silicon photonics elements such as trans-impedance amplifiers (TIA) and Tx Driver\n● Contribute to the development of complex SoC integration flows, with a strong focus on high-speed circuit design and advanced node integration. You will work closely with photonics and 3DIC packaging teams to co-develop solutions for leading-edge products\n● Support micro-architecture development with chip architects by conducting feasibility studies\n● Collaborate with members of our design engineering teams (system, digital, analog, photonics) to define electrical requirements\n● Drive block-level floorplan, mask design views, and their reviews\n● Run post-layout and mixed-signal top-level simulations to validate integration\n● Define production and bench-level test plans\n● Validate performances of the circuits in the lab\n● Mentor junior design engineers\n\n职位要求\n● Minimum MSEE with 8+ years or Ph.D. with 5+ years of relevant industry experience with a focus on optical or wireline transceiver design for 20+ Gbps NRZ and PAM applications\n● Experience designing Analog-Front-End blocks such as trans-impedance amplifiers (TIA) and Tx Driver\n● Experience interfacing with silicon photonic modulators (MZM, MRM)\n● Understanding of photonic devices: waveguides, couplers, photodetectors, electro-optic modulators, micro-ring resonators\n● Experience with Tx/Rx equalization techniques and circuits\n● Hands-on experience with 3D Electro-Magnetic (EM) simulation tools is required\n● Self-driven, excellent problem solving and analytical skills, good communication skills and a strong team player.\n● Local and international travel may be required.\nThe candidate will be the major interface to the optical IO analog/mixed signal design team or vendor. As a member of the analog team, you’ll collaborate with our architects and engineers to develop innovative high speed analog transceiver solutions for next-generation optical and wireline communication systems.\n* We are currently hiring for multiple levels for this role. Your level and compensation will be determined by your experience, education, and location.\n● Design analog/mixed-signal blocks with a focus on transceivers and broadband circuits interfacing with silicon photonics elements such as trans-impedance amplifiers (TIA) and Tx Driver\n● Contribute to the development of complex SoC integration flows, with a strong focus on high-speed circuit design and advanced node integration. You will work closely with photonics and 3DIC packaging teams to co-develop solutions for leading-edge products\n● Support micro-architecture development with chip architects by conducting feasibility studies\n● Collaborate with members of our design engineering teams (system, digital, analog, photonics) to define electrical requirements\n● Drive block-level floorplan, mask design views, and their reviews\n● Run post-layout and mixed-signal top-level simulations to validate integration\n● Define production and bench-level test plans\n● Validate performances of the circuits in the lab\n● Mentor junior design engineers\n● Minimum MSEE with 8+ years or Ph.D. with 5+ years of relevant industry experience with a focus on optical or wireline transceiver design for 20+ Gbps NRZ and PAM applications\n● Experience designing Analog-Front-End blocks such as trans-impedance amplifiers (TIA) and Tx Driver\n● Experience interfacing with silicon photonic modulators (MZM, MRM)\n● Understanding of photonic devices: waveguides, couplers, photodetectors, electro-optic modulators, micro-ring resonators\n● Experience with Tx/Rx equalization techniques and circuits\n● Hands-on experience with 3D Electro-Magnetic (EM) simulation tools is required\n● Self-driven, excellent problem solving and analytical skills, good communication skills and a strong team player.\n● Local and international travel may be required.",
    "standard_classification": {
        "std_category_code": "T024",
        "std_aux_codes": [],
        "std_category_status": null,
        "std_taxonomy_version": "20261104"
    }
}