主分类：芯片设计与验证
来源 JD 数据（旧分类保留，当前主分类见上方）
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"job": {
"job_title": "平头哥-网络芯片设计专家-成都/杭州",
"job_level": "专家",AI生成
"work_category": "全职",AI生成
"department": "阿里集团",
"location": "成都 / 杭州",
"work_mode": "未披露",AI生成
"job_category": "技术-芯片"AI生成
},
"company": {
"company_name": "平头哥",
"company_industry": "半导体 / 芯片设计",
"company_size": "未披露",
"company_website": "alibaba.com",
"company_description": "平头哥研发计算、存储及网络芯片，为人工智能基础设施提供支持。"
},
"compensation": {
"salary_range": {
"min": "",
"max": "",
"currency": "未披露",
"cycle": "未披露"
},
"benefits": "未披露"
},
"requirements": {
"working_years": "",
"degree": "本科及以上",
"language": "未披露",AI生成
"visa_support": "未披露",
"responsibilities": "1、负责和参与DPU芯片的应用场景与需求分析；\n2、负责和参与DPU芯片架构方案的讨论与设计；\n3、负责和参与DPU芯片各子系统微架构的方案设计与编码；\n4、与验证团队协同完成芯片BUG收敛，包括芯片问题定位分析、Corner点识别和覆盖率分析等；\n5、负责和参与模块的物理综合和设计。\nJob responsibilities:\n1. Be responsible for and participate in the analysis of application scenarios and requirements of DPU chips;\n2. Be responsible for and participate in the discussion and design of DPU chip architecture;\n3. Be responsible for and participate in the scheme design and coding of the microarchitecture of DPU chip subsystem;\n4. Cooperate with the verification team to complete chip BUG convergence, including chip problem location analysis, Corner point identification and coverage analysis, etc;\n5. Be responsible for and participate in the physical synthesis and design of modules.",
"requirements_text": "1、本科及以上，电子工程，微电子，通讯，计算机专业等优先；\n2、具备两年以上数字芯片设计经验；\n3、具备物理综合，时序分析与优化，形式验证，可验证性设计，低功耗设计等方面的经验；\n4、具备泛网络类芯片，比如网卡芯片，交换机，路由器芯片设计经验优先；\n5、富有激情，有创新意识和能力，具有良好的团队合作能力。\nSkills and experience:\n1. Bachelor degree or above, major in electronic engineering, microelectronics, communication, computer, etc. is preferred;\n2. Have more than two years of experience in digital chip design;\n3. Experience in physical synthesis, timing analysis and optimization, formal verification, low power design, etc;\n4. Experience in designing network chips, such as NIC chips, switches and router chips is preferred;\n5, Full of passion, innovative consciousness and ability, with good teamwork ability.",
"skills": [AI生成
"芯片设计",
"团队协作"
],
"preferred_qualifications": "1、本科及以上，电子工程，微电子，通讯，计算机专业等优先；4、具备泛网络类芯片，比如网卡芯片，交换机，路由器芯片设计经验优先；1. Bachelor degree or above, major in electronic engineering, microelectronics, communication, computer, etc. is preferred；4. Experience in designing network chips, such as NIC chips, switches and router chips is preferred",
"job_highlights": "未披露"
},
"contact": {
"recruiter_name": "未披露",
"contact_methods": [
{
"type": "apply_link",
"value": "https://recruitment.t-head.cn/off-campus/position-detail?positionId=100006820012"
}
]
},
"posting": {
"posting_id": "100006820012",
"post_date": "2026-08-26",
"hire_time": "未披露",
"update_date": "20260917",
"job_url": "https://recruitment.t-head.cn/off-campus/position-detail?positionId=100006820012"
},
"fulltext": "平头哥-网络芯片设计专家-成都/杭州\n平头哥-网络芯片设计专家-成都/杭州\n\n基础信息\n职位类别：技术-芯片\n工作地点：成都 / 杭州\n\n职位描述\n1、负责和参与DPU芯片的应用场景与需求分析；\n2、负责和参与DPU芯片架构方案的讨论与设计；\n3、负责和参与DPU芯片各子系统微架构的方案设计与编码；\n4、与验证团队协同完成芯片BUG收敛，包括芯片问题定位分析、Corner点识别和覆盖率分析等；\n5、负责和参与模块的物理综合和设计。\nJob responsibilities:\n1. Be responsible for and participate in the analysis of application scenarios and requirements of DPU chips;\n2. Be responsible for and participate in the discussion and design of DPU chip architecture;\n3. Be responsible for and participate in the scheme design and coding of the microarchitecture of DPU chip subsystem;\n4. Cooperate with the verification team to complete chip BUG convergence, including chip problem location analysis, Corner point identification and coverage analysis, etc;\n5. Be responsible for and participate in the physical synthesis and design of modules.\n\n职位要求\n1、本科及以上，电子工程，微电子，通讯，计算机专业等优先；\n2、具备两年以上数字芯片设计经验；\n3、具备物理综合，时序分析与优化，形式验证，可验证性设计，低功耗设计等方面的经验；\n4、具备泛网络类芯片，比如网卡芯片，交换机，路由器芯片设计经验优先；\n5、富有激情，有创新意识和能力，具有良好的团队合作能力。\nSkills and experience:\n1. Bachelor degree or above, major in electronic engineering, microelectronics, communication, computer, etc. is preferred;\n2. Have more than two years of experience in digital chip design;\n3. Experience in physical synthesis, timing analysis and optimization, formal verification, low power design, etc;\n4. Experience in designing network chips, such as NIC chips, switches and router chips is preferred;\n5, Full of passion, innovative consciousness and ability, with good teamwork ability.\n1、负责和参与DPU芯片的应用场景与需求分析；\n2、负责和参与DPU芯片架构方案的讨论与设计；\n3、负责和参与DPU芯片各子系统微架构的方案设计与编码；\n4、与验证团队协同完成芯片BUG收敛，包括芯片问题定位分析、Corner点识别和覆盖率分析等；\n5、负责和参与模块的物理综合和设计。\nJob responsibilities:\n1. Be responsible for and participate in the analysis of application scenarios and requirements of DPU chips;\n2. Be responsible for and participate in the discussion and design of DPU chip architecture;\n3. Be responsible for and participate in the scheme design and coding of the microarchitecture of DPU chip subsystem;\n4. Cooperate with the verification team to complete chip BUG convergence, including chip problem location analysis, Corner point identification and coverage analysis, etc;\n5. Be responsible for and participate in the physical synthesis and design of modules.\n1、本科及以上，电子工程，微电子，通讯，计算机专业等优先；\n2、具备两年以上数字芯片设计经验；\n3、具备物理综合，时序分析与优化，形式验证，可验证性设计，低功耗设计等方面的经验；\n4、具备泛网络类芯片，比如网卡芯片，交换机，路由器芯片设计经验优先；\n5、富有激情，有创新意识和能力，具有良好的团队合作能力。\nSkills and experience:\n1. Bachelor degree or above, major in electronic engineering, microelectronics, communication, computer, etc. is preferred;\n2. Have more than two years of experience in digital chip design;\n3. Experience in physical synthesis, timing analysis and optimization, formal verification, low power design, etc;\n4. Experience in designing network chips, such as NIC chips, switches and router chips is preferred;\n5, Full of passion, innovative consciousness and ability, with good teamwork ability.",
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