{
    "schema_version": "via_ai_product_manager_jobs_v1",
    "data_type": "ai_product_manager_jobs",
    "job": {
        "job_title": "平头哥-AI芯片低功耗设计专家-上海",
        "job_level": "专家",AI生成
        "work_category": "全职",AI生成
        "department": "阿里集团",
        "location": "上海",
        "work_mode": "未披露",AI生成
        "job_category": "技术-芯片"AI生成
    },
    "company": {
        "company_name": "平头哥",
        "company_industry": "半导体 / 芯片设计",
        "company_size": "未披露",
        "company_website": "alibaba.com",
        "company_description": "平头哥研发计算、存储及网络芯片，为人工智能基础设施提供支持。"
    },
    "compensation": {
        "salary_range": {
            "min": "",
            "max": "",
            "currency": "未披露",
            "cycle": "未披露"
        },
        "benefits": "未披露"
    },
    "requirements": {
        "working_years": 5,
        "degree": "硕士",
        "language": "未披露",AI生成
        "visa_support": "未披露",
        "responsibilities": "As a member of the power team, works with the front-end design team together to deliver the excellent power efficiency product. The responsibility includes (but is not limited to):\n- Identify/optimize RTL design power by workload power simulation and analysis.\n- Co-work with design/verification teams to define and develop different power tests. \n- Low power features development and verification.\n- Delivery different workloads’ power simulation data for IR-drop, PDN and thermal analysis.\n- Define power optimization solution/methodology/flow and drive them into the design.",
        "requirements_text": "- +5 years validated experience in RTL design/verification. \n- Experienced in power analysis/optimization at architecture/RTL/block synthesis.\n- Experienced in one or more power features design (like droop-mitigation, peak current control, dynamic frequency scaling, etc…)\n- A strong coding skill in Perl or Python or other script languages and the validated flow development experience.\n- Good understanding of the synthesis/backend flows and technology for power.\n- Experience with tools (Spyglass, PowerArtist, PtPx) is a plus.\n- Experience in silicon level power features bring-up is a plus.\n- Strong problem solving and analytical skills and excellent cross-functional communication skills.",
        "skills": [AI生成
            "Python",
            "沟通能力"
        ],
        "preferred_qualifications": "未披露",
        "job_highlights": "未披露"
    },
    "contact": {
        "recruiter_name": "未披露",
        "contact_methods": [
            {
                "type": "apply_link",
                "value": "https://recruitment.t-head.cn/off-campus/position-detail?positionId=100018000001"
            }
        ]
    },
    "posting": {
        "posting_id": "100018000001",
        "post_date": "2026-09-03",
        "hire_time": "未披露",
        "update_date": "20260917",
        "job_url": "https://recruitment.t-head.cn/off-campus/position-detail?positionId=100018000001"
    },
    "fulltext": "平头哥-AI芯片低功耗设计专家-上海\n平头哥-AI芯片低功耗设计专家-上海\n\n基础信息\n职位类别：技术-芯片\n工作地点：上海\n\n职位描述\nAs a member of the power team, works with the front-end design team together to deliver the excellent power efficiency product. The responsibility includes (but is not limited to):\n- Identify/optimize RTL design power by workload power simulation and analysis.\n- Co-work with design/verification teams to define and develop different power tests. \n- Low power features development and verification.\n- Delivery different workloads’ power simulation data for IR-drop, PDN and thermal analysis.\n- Define power optimization solution/methodology/flow and drive them into the design.\n\n职位要求\n- +5 years validated experience in RTL design/verification. \n- Experienced in power analysis/optimization at architecture/RTL/block synthesis.\n- Experienced in one or more power features design (like droop-mitigation, peak current control, dynamic frequency scaling, etc…)\n- A strong coding skill in Perl or Python or other script languages and the validated flow development experience.\n- Good understanding of the synthesis/backend flows and technology for power.\n- Experience with tools (Spyglass, PowerArtist, PtPx) is a plus.\n- Experience in silicon level power features bring-up is a plus.\n- Strong problem solving and analytical skills and excellent cross-functional communication skills.\nAs a member of the power team, works with the front-end design team together to deliver the excellent power efficiency product. The responsibility includes (but is not limited to):\n- Identify/optimize RTL design power by workload power simulation and analysis.\n- Co-work with design/verification teams to define and develop different power tests. \n- Low power features development and verification.\n- Delivery different workloads’ power simulation data for IR-drop, PDN and thermal analysis.\n- Define power optimization solution/methodology/flow and drive them into the design.\n- +5 years validated experience in RTL design/verification. \n- Experienced in power analysis/optimization at architecture/RTL/block synthesis.\n- Experienced in one or more power features design (like droop-mitigation, peak current control, dynamic frequency scaling, etc…)\n- A strong coding skill in Perl or Python or other script languages and the validated flow development experience.\n- Good understanding of the synthesis/backend flows and technology for power.\n- Experience with tools (Spyglass, PowerArtist, PtPx) is a plus.\n- Experience in silicon level power features bring-up is a plus.\n- Strong problem solving and analytical skills and excellent cross-functional communication skills.",
    "standard_classification": {
        "std_category_code": "T024",
        "std_aux_codes": [],
        "std_category_status": null,
        "std_taxonomy_version": "20261104"
    }
}