{
    "schema_version": "via_ai_product_manager_jobs_v1",
    "data_type": "ai_product_manager_jobs",
    "job": {
        "job_title": "平头哥-AI chip performance/power architect-上海",
        "job_level": "未披露",AI生成
        "work_category": "全职",AI生成
        "department": "阿里集团",
        "location": "上海",
        "work_mode": "未披露",AI生成
        "job_category": "技术-芯片"AI生成
    },
    "company": {
        "company_name": "平头哥",
        "company_industry": "半导体 / 芯片设计",
        "company_size": "未披露",
        "company_website": "alibaba.com",
        "company_description": "平头哥研发计算、存储及网络芯片，为人工智能基础设施提供支持。"
    },
    "compensation": {
        "salary_range": {
            "min": "",
            "max": "",
            "currency": "未披露",
            "cycle": "未披露"
        },
        "benefits": "未披露"
    },
    "requirements": {
        "working_years": "",
        "degree": "本科",
        "language": "未披露",AI生成
        "visa_support": "未披露",
        "responsibilities": "Collaborate with the software and hardware team to design and optimize general purpose AI chip architectures. \nConduct in-depth performance and power analysis of AI chip workloads. Identify and address performance bottlenecks and power issues in the architecture.\nCollaborate with the software and hardware teams to optimize AI chip performance and improve power efficiency through micro-architectural and algorithmic improvements.\nStay up-to-date with the latest advancements in AI chip technology and performance/power optimization techniques. Conduct research and experiments to explore new performance/power optimization opportunities.",
        "requirements_text": "Deep understanding of general purpose AI chip architecture; \nExperience with performance profiling and analysis tools (e.g., NVIDIA Nsight). Familiarity with AI chip programming models (especially for CUDA). Experience with RTL design and power analysis tools (e.g., PTPX).\nStrong analytical and problem-solving skills.\nExcellent communication and collaboration skills.\nFamiliarity with AI workloads is a plus.",
        "skills": [AI生成
            "CUDA",
            "团队协作"
        ],
        "preferred_qualifications": "未披露",
        "job_highlights": "未披露"
    },
    "contact": {
        "recruiter_name": "未披露",
        "contact_methods": [
            {
                "type": "apply_link",
                "value": "https://recruitment.t-head.cn/off-campus/position-detail?positionId=100018640013"
            }
        ]
    },
    "posting": {
        "posting_id": "100018640013",
        "post_date": "2026-08-31",
        "hire_time": "未披露",
        "update_date": "20260917",
        "job_url": "https://recruitment.t-head.cn/off-campus/position-detail?positionId=100018640013"
    },
    "fulltext": "平头哥-AI chip performance/power architect-上海\n平头哥-AI chip performance/power architect-上海\n\n基础信息\n职位类别：技术-芯片\n工作地点：上海\n\n职位描述\nCollaborate with the software and hardware team to design and optimize general purpose AI chip architectures. \nConduct in-depth performance and power analysis of AI chip workloads. Identify and address performance bottlenecks and power issues in the architecture.\nCollaborate with the software and hardware teams to optimize AI chip performance and improve power efficiency through micro-architectural and algorithmic improvements.\nStay up-to-date with the latest advancements in AI chip technology and performance/power optimization techniques. Conduct research and experiments to explore new performance/power optimization opportunities.\n\n职位要求\nDeep understanding of general purpose AI chip architecture; \nExperience with performance profiling and analysis tools (e.g., NVIDIA Nsight). Familiarity with AI chip programming models (especially for CUDA). Experience with RTL design and power analysis tools (e.g., PTPX).\nStrong analytical and problem-solving skills.\nExcellent communication and collaboration skills.\nFamiliarity with AI workloads is a plus.\nCollaborate with the software and hardware team to design and optimize general purpose AI chip architectures. \nConduct in-depth performance and power analysis of AI chip workloads. Identify and address performance bottlenecks and power issues in the architecture.\nCollaborate with the software and hardware teams to optimize AI chip performance and improve power efficiency through micro-architectural and algorithmic improvements.\nStay up-to-date with the latest advancements in AI chip technology and performance/power optimization techniques. Conduct research and experiments to explore new performance/power optimization opportunities.\nDeep understanding of general purpose AI chip architecture; \nExperience with performance profiling and analysis tools (e.g., NVIDIA Nsight). Familiarity with AI chip programming models (especially for CUDA). Experience with RTL design and power analysis tools (e.g., PTPX).\nStrong analytical and problem-solving skills.\nExcellent communication and collaboration skills.\nFamiliarity with AI workloads is a plus.",
    "standard_classification": {
        "std_category_code": "T024",
        "std_aux_codes": [],
        "std_category_status": null,
        "std_taxonomy_version": "20261104"
    }
}