{
    "schema_version": "via_ai_product_manager_jobs_v1",
    "data_type": "ai_product_manager_jobs",
    "job": {
        "job_title": "平头哥-AI芯片架构师-上海",
        "job_level": "未披露",AI生成
        "work_category": "全职",AI生成
        "department": "阿里集团",
        "location": "上海",
        "work_mode": "未披露",AI生成
        "job_category": "技术-芯片"AI生成
    },
    "company": {
        "company_name": "平头哥",
        "company_industry": "半导体 / 芯片设计",
        "company_size": "未披露",
        "company_website": "alibaba.com",
        "company_description": "平头哥研发计算、存储及网络芯片，为人工智能基础设施提供支持。"
    },
    "compensation": {
        "salary_range": {
            "min": "",
            "max": "",
            "currency": "未披露",
            "cycle": "未披露"
        },
        "benefits": "未披露"
    },
    "requirements": {
        "working_years": 10,
        "degree": "* Master's or Ph.D. in Electrical Engineering",
        "language": "未披露",AI生成
        "visa_support": "未披露",
        "responsibilities": "We are seeking a highly skilled and innovative AI Chip Architect who will play a key role in the development of cutting-edge AI hardware. The ideal candidate is a visionary and a problem-solver, capable of designing complex chip architectures optimized for performance, efficiency, and scalability. \nIn this role, you will work with software and hardware engineering groups to define state-of-the-art AI chip architecture for high-performance computing system in Data Center.\nKey Responsibilities:\n* Define the architecture for the next-generation AI chips, including high-performance computing system, hierarchically memory/cache system, and high-speed interconnects.\n* Collaborate with a cross-functional team of hardware engineers, software developers, and machine learning specialists to ensure designs meet the performance and power requirements of AI applications.\n* Propose and evaluate architectural innovations to improve throughput, latency, energy efficiency, and scalability of AI processing.\n* Produce thorough documentation to articulate design decisions and architectural trade-offs to stakeholders.\n* Participate in design reviews, providing critical feedback and insights to improve chip quality and performance.\n* Oversee and contribute to the entire lifecycle of the chip design process, from specification to production and post-production support.\n* Mentor junior engineers and contribute to a culture of technical excellence.",
        "requirements_text": "* Master's or Ph.D. in Electrical Engineering, Computer Science, or a related field.\n* A minimum of 10 years of experience in complex chip design and architecture, with a focus on AI or high-performance computing applications.\n* In-depth knowledge of AI algorithms and their computational and memory requirements.\n* Familiarity with chip design tools and methodologies, including RTL design using Verilog or VHDL.\n* Experience with programming languages such as C/C++ and scripting languages such as Python.\n* Strong analytical and problem-solving skills, with the ability to innovate and think creatively.\n* Good verbal and written skill for communication.",
        "skills": [AI生成
            "Python",
            "C++",
            "Verilog",
            "C语言"
        ],
        "preferred_qualifications": "未披露",
        "job_highlights": "未披露"
    },
    "contact": {
        "recruiter_name": "未披露",
        "contact_methods": [
            {
                "type": "apply_link",
                "value": "https://recruitment.t-head.cn/off-campus/position-detail?positionId=794714"
            }
        ]
    },
    "posting": {
        "posting_id": "794714",
        "post_date": "2026-09-16",
        "hire_time": "未披露",
        "update_date": "20260917",
        "job_url": "https://recruitment.t-head.cn/off-campus/position-detail?positionId=794714"
    },
    "fulltext": "平头哥-AI芯片架构师-上海\n平头哥-AI芯片架构师-上海\n\n基础信息\n职位类别：技术-芯片\n工作地点：上海\n\n职位描述\nWe are seeking a highly skilled and innovative AI Chip Architect who will play a key role in the development of cutting-edge AI hardware. The ideal candidate is a visionary and a problem-solver, capable of designing complex chip architectures optimized for performance, efficiency, and scalability. \nIn this role, you will work with software and hardware engineering groups to define state-of-the-art AI chip architecture for high-performance computing system in Data Center.\nKey Responsibilities:\n* Define the architecture for the next-generation AI chips, including high-performance computing system, hierarchically memory/cache system, and high-speed interconnects.\n* Collaborate with a cross-functional team of hardware engineers, software developers, and machine learning specialists to ensure designs meet the performance and power requirements of AI applications.\n* Propose and evaluate architectural innovations to improve throughput, latency, energy efficiency, and scalability of AI processing.\n* Produce thorough documentation to articulate design decisions and architectural trade-offs to stakeholders.\n* Participate in design reviews, providing critical feedback and insights to improve chip quality and performance.\n* Oversee and contribute to the entire lifecycle of the chip design process, from specification to production and post-production support.\n* Mentor junior engineers and contribute to a culture of technical excellence.\n\n职位要求\n* Master's or Ph.D. in Electrical Engineering, Computer Science, or a related field.\n* A minimum of 10 years of experience in complex chip design and architecture, with a focus on AI or high-performance computing applications.\n* In-depth knowledge of AI algorithms and their computational and memory requirements.\n* Familiarity with chip design tools and methodologies, including RTL design using Verilog or VHDL.\n* Experience with programming languages such as C/C++ and scripting languages such as Python.\n* Strong analytical and problem-solving skills, with the ability to innovate and think creatively.\n* Good verbal and written skill for communication.\nWe are seeking a highly skilled and innovative AI Chip Architect who will play a key role in the development of cutting-edge AI hardware. The ideal candidate is a visionary and a problem-solver, capable of designing complex chip architectures optimized for performance, efficiency, and scalability. \nIn this role, you will work with software and hardware engineering groups to define state-of-the-art AI chip architecture for high-performance computing system in Data Center.\nKey Responsibilities:\n* Define the architecture for the next-generation AI chips, including high-performance computing system, hierarchically memory/cache system, and high-speed interconnects.\n* Collaborate with a cross-functional team of hardware engineers, software developers, and machine learning specialists to ensure designs meet the performance and power requirements of AI applications.\n* Propose and evaluate architectural innovations to improve throughput, latency, energy efficiency, and scalability of AI processing.\n* Produce thorough documentation to articulate design decisions and architectural trade-offs to stakeholders.\n* Participate in design reviews, providing critical feedback and insights to improve chip quality and performance.\n* Oversee and contribute to the entire lifecycle of the chip design process, from specification to production and post-production support.\n* Mentor junior engineers and contribute to a culture of technical excellence.\n* Master's or Ph.D. in Electrical Engineering, Computer Science, or a related field.\n* A minimum of 10 years of experience in complex chip design and architecture, with a focus on AI or high-performance computing applications.\n* In-depth knowledge of AI algorithms and their computational and memory requirements.\n* Familiarity with chip design tools and methodologies, including RTL design using Verilog or VHDL.\n* Experience with programming languages such as C/C++ and scripting languages such as Python.\n* Strong analytical and problem-solving skills, with the ability to innovate and think creatively.\n* Good verbal and written skill for communication.",
    "standard_classification": {
        "std_category_code": "T024",
        "std_aux_codes": [],
        "std_category_status": null,
        "std_taxonomy_version": "20261104"
    }
}