{
    "summary": {
        "overall_match": "候选人具备扎实的FPGA开发与图像处理经验，技术能力高度匹配岗位需求，综合匹配度高，建议推进。",
        "key_strengths": [
            "核心技术完全覆盖，精通FPGA开发及多种高速接口协议",
            "具备视觉图像处理项目经验，与高端视觉传感器业务高度契合"
        ],
        "key_concerns": [
            "期望薪资、工作地点及大小周办公方式等关键信息缺失，需后续沟通确认",
            "最近一段工作经历不足两年，稳定性需进一步关注"
        ],
        "recommendation_summary": "技术匹配度极高且置信度高，综合分达到strong_approve标准，缺失信息不阻碍推荐，建议尽快安排面试以确认薪资与节奏意愿。"
    },
    "dimensions": [
        {
            "name": "tech_power",
            "raw_score": 90,
            "confidence_level": "high",
            "jd_requirement": "统招本科以上，3-5年FPGA\/研发经验，具备视觉传感器或图像处理相关研发能力",
            "resume_fulfillment": "电子科学与技术本科，约3年10个月FPGA开发经验。精通Verilog\/C及多种高速接口，有完整的数据采集与图像处理（滤波、色度转换、目标提取）项目经验，技术高度匹配。"
        },
        {
            "name": "stability",
            "raw_score": 65,
            "confidence_level": "medium",
            "jd_requirement": "3-5年工作经验，期望候选人具备较好的职业稳定性",
            "resume_fulfillment": "总工作经验约3年10个月，满足年限要求。最近一段工作任职16个月，前一段任职2.5年，历史平均任职2.5年，稳定性表现中等。"
        },
        {
            "name": "salary_match",
            "raw_score": 50,
            "confidence_level": "low",
            "jd_requirement": "期望薪资范围22-30K",
            "resume_fulfillment": "简历未提供期望薪资，信息缺失，无法评估匹配度，需后续沟通确认。"
        },
        {
            "name": "pace_match",
            "raw_score": 50,
            "confidence_level": "low",
            "jd_requirement": "工作地点深圳，大小周（早9晚9）",
            "resume_fulfillment": "候选人目前在四川工作，未说明是否接受异地搬迁、大小周及高强度工作节奏，信息缺失，需后续沟通确认。"
        },
        {
            "name": "communication",
            "raw_score": 85,
            "confidence_level": "high",
            "jd_requirement": "此项为简历信息表达质量评估，JD无直接要求",
            "resume_fulfillment": "简历模块清晰，字段完整，项目描述包含具体技术栈、背景与成果，表达专业且逻辑连贯，信息呈现质量高。"
        }
    ],
    "match_score": 82.2,
    "overall_confidence": 0.71,
    "recommendation": "strong_approve"
}

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