{
    "summary": {
        "overall_match": "候选人具备扎实的FPGA开发与高速信号处理经验，技术能力高度匹配，但缺乏图像\/视觉算法相关场景经验，且未明确表态接受大小周及高强度加班。",
        "key_strengths": [
            "精通Verilog及大规模逻辑设计，具备复杂时序收敛与板级调试能力",
            "拥有40G\/100G高速接口及报文处理量产项目经验，交付能力强",
            "211科班出身，具备完整的项目周期主导与多版本迭代经验"
        ],
        "key_concerns": [
            "缺乏图像处理\/视觉算法FPGA开发经验，需评估场景迁移能力",
            "未明确表态是否接受大小周及早9晚9的工作节奏",
            "期望薪资面议，需后续沟通确认具体数字"
        ],
        "recommendation_summary": "候选人底层FPGA技术能力突出，有高速信号量产经验，技术匹配度极高。虽缺乏图像视觉场景经验且未明确加班意愿，但综合技术实力强，建议推进面试以核实场景迁移能力及工作节奏接受度。"
    },
    "dimensions": [
        {
            "name": "tech_power",
            "raw_score": 90,
            "confidence_level": "high",
            "jd_requirement": "3年以上图像处理\/信号处理算法FPGA开发经验，熟练Verilog，熟悉MIPI\/PCIE\/USB\/LVDS等高速接口，具备大规模逻辑设计与时序调试能力。",
            "resume_fulfillment": "熟练掌握Verilog及大规模逻辑设计，具备40G\/100G高速接口（Interlaken\/DDR\/Aurora）调试与量产经验。但过往经验集中在网络DPI报文处理，缺乏MIPI\/USB\/LVDS及图像\/视觉算法场景经验。"
        },
        {
            "name": "stability",
            "raw_score": 80,
            "confidence_level": "medium",
            "jd_requirement": "JD未明确说明，依据历史任职年限与稳定性规则评估。",
            "resume_fulfillment": "毕业后仅有一段正式工作经历（2023.03至今），任职超3年，期间担任FPGA模块负责人，职责持续扩大，稳定性良好。"
        },
        {
            "name": "salary_match",
            "raw_score": 50,
            "confidence_level": "low",
            "jd_requirement": "22-30K",
            "resume_fulfillment": "目前薪资20K，期望薪资面议，缺乏明确期望数字，无法直接评估匹配度。"
        },
        {
            "name": "pace_match",
            "raw_score": 60,
            "confidence_level": "medium",
            "jd_requirement": "深圳工作，大小周（早9晚9），需接受研发攻关期加班和压力。",
            "resume_fulfillment": "明确接受深圳工作，但未说明是否接受大小周及早9晚9的高强度工作节奏，到岗时间未知。"
        },
        {
            "name": "communication",
            "raw_score": 95,
            "confidence_level": "high",
            "jd_requirement": "此项为简历信息表达质量评估，JD无直接要求。",
            "resume_fulfillment": "简历结构清晰，模块完整，项目经历采用STAR法则描述，有明确的量化成果和技术细节，表达专业度高。"
        }
    ],
    "match_score": 80.9,
    "overall_confidence": 0.87,
    "information_coverage": 0.95,
    "risks": {
        "hard_constraint_risks": [],
        "confirmed_high_risks": [],
        "potential_risks": [
            "候选人过往经验集中在网络通信与DPI报文处理，缺乏智能工业相机或计算成像等图像处理\/视觉算法的FPGA开发经验，场景迁移能力需面试核实。",
            "节奏匹配原始分为60，候选人未明确表态是否接受大小周及早9晚9的工作节奏，存在潜在的节奏冲突风险。"
        ]
    },
    "missing_information": [
        "候选人期望薪资为面议，未提供具体期望数字。",
        "候选人未明确表态是否接受大小周及早9晚9的工作安排。",
        "候选人未提供明确的到岗时间。",
        "候选人未明确说明是否具备数量阅读英文文档的能力。"
    ],
    "recommendation": "strong_approve"
}

{
    "events": [
        {
            "eventName": "ObjectCreated:PutObject",
            "eventSource": "acs:oss",
            "eventTime": "2026-09-07T07:40:37.000Z",
            "eventVersion": "1.0",
            "oss": {
                "bucket": {
                    "arn": "acs:oss:cn-hangzhou:1748673497100614:langbowei-static",
                    "name": "langbowei-static",
                    "ownerIdentity": "1748673497100614",
                    "virtualBucket": ""
                },
                "object": {
                    "deltaSize": 10153,
                    "eTag": "1B789E97F8D4E426E727BAF31E109FF1",
                    "key": "parsed\/resumes\/1-6a9e69b8-1534d7-ef82cbf45b8d__widget_1704704635359_merged.png.parsed.json",
                    "objectMeta": {
                        "mimeType": "application\/json"
                    },
                    "size": 10153
                },
                "ossSchemaVersion": "1.0",
                "ruleId": "ca5b3a7a3f9032c56d393bfb816e6376962c91d8"
            },
            "region": "cn-hangzhou",
            "requestParameters": {
                "sourceIPAddress": "172.16.0.129"
            },
            "responseElements": {
                "requestId": "6A9E6A74A50781343282ADDC"
            },
            "userIdentity": {
                "principalId": "300891235492433224"
            }
        }
    ]
}