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        "birth_date": null,
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        "work_years": "6.1"
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            "major": "电子信息工程",
            "degree": "本科",
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    "job_intention": {
        "expected_position": "FPGA工程师, 嵌入式软件开发, 软硬件工程师",
        "expected_salary": null,
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        "availability": null
    },
    "skills": [
        "Verilog",
        "FPGA逻辑开发",
        "以太网TCP\/IP协议",
        "1588时间同步协议",
        "IRIG-B码协议",
        "CPRI接口",
        "eCPRI接口",
        "上变频DUC",
        "下变频DDC",
        "MIPI接口",
        "AXI总线",
        "PCIE",
        "示波器",
        "频谱仪",
        "xilinx",
        "安路",
        "紫光同创",
        "高云",
        "复旦微",
        "1G MACIP核调试",
        "FreeRTOS",
        "MCU嵌入式接口开发",
        "C语言",
        "GD32",
        "stm32",
        "瑞芯微"
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    "work_experience": [
        {
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            "position": "FPGA工程师",
            "duration": "2020\/07 - 2023\/05",
            "description": "1、高速接口调试和仿真（JESD204B接口、CPRI接口、eCPRI接口、以太网接口）。\n2、负责RRU基站频谱检测功能和TCP\/IP协议的逻辑开发和仿真。\n3、使用频谱仪、信号源等仪器测试RRU基站的性能指标。"
        },
        {
            "company": "深圳市夏光时间技术有限公司",
            "position": "FPGA工程师",
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            "description": "1、TSN项目中TCP\/IP协议和PCIE接口的逻辑开发和调试。\n2、以太网TCP\/IP协议数据报文签名字段CRC的逻辑开发和仿真。\n3、TSN项目1G和10G\/25G的乱序逻辑设计。\n4、TSN项目中TSN协议（QBV、QBU）的逻辑开发和调试。\n离职原因：裁员"
        },
        {
            "company": "深圳市中科海信科技有限公司",
            "position": "FPGA工程师",
            "duration": "2024\/03 - 2026\/05",
            "description": "1、负责AD7960芯片信号采集时序开发、傅里叶变换和IQ信号处理的开发。\n2、负责FPGA和MCU之间SPI总线开发。"
        },
        {
            "company": "深圳市拓普瑞电子有限公司",
            "position": "软硬件工程师",
            "duration": "2026\/06 - 2026\/08",
            "description": "硬件电路设计：（兆易GD32芯片）\n1、8路DAC芯片恒流输出和8路ADC数据采集电路设计。\n2、设计485接口电路。\n3、电源电路设计。\n嵌入式软件开发：\n1、国产GD32芯片开发8路ADC采集、8路SPI总线控制外部DAC恒流输出。\n2、开发modbus总线485通信，TTL电平串口、SPI总线、CAN总线、网口驱动。"
        }
    ],
    "project_experience": [
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            "duration": null,
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        },
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            "duration": null,
            "description": "FPGA(ZYNQultrascale+)接收千兆网口和万兆网口的数据报文。TSN_1G\/10G\/25G板卡FPGA使用TCP\/IP协议并行处理网口进来的数据包，流量分析器对数据报文做TCP\/IP协议解析及分类处理成arp、ping、ptp、mpacket。根据数据链路层数据帧协议对数据包做分类处理，再根据流量ID号并行做32条流量数据的最大\/最小\/平均延时和最大\/最小\/平均抖动统计。延时抖动统计结果通过AXI_DMA传输至ARM。流量捕获器做数据报文的解析和过滤，通过AXI_DMA传输至ARM。同时，FPGA的流量发生器会通过TCP\/IP协议发送数据报文至网口\/光口。"
        },
        {
            "name": "测距雷达项目",
            "role": null,
            "duration": null,
            "description": "使用国产FPGA（安路）控制外部VCO发送调频连续波信号，FPGA通过串行接口采集AD7960信号，然后做傅里叶变换和最大频点选择，然后将频点通过SPI总线传输至MCU，MCU通过频点计算高度，将高度值通过RS422串口上传至上位机显示。"
        }
    ],
    "certifications": [],
    "self_evaluation": null
}

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