简历解析详情

简历解析 #1257

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请求 ID
1-6ad31376-15bb47-aefef64f04be
状态
success
创建时间
2026-10-17 14:21:44
ID id
1257
请求 ID request_id
1-6ad31376-15bb47-aefef64f04be
解析时间 parsed_at
2026-10-17 06:19:38
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Kyle
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            "degree": "本科",
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        "WIFI",
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        "图像处理算法",
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    "work_experience": [
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            "company": "某精密仪器",
            "position": "FPGA开发",
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        },
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            "company": "TCL实业控股股份有限公司",
            "position": "FPGA开发",
            "duration": "2025\/05-2025\/09",
            "description": "1,微架构设计与数传模块开发;2,配合原型机验证;3,劳务派遣,协助量产"
        },
        {
            "company": "某某军工\/某某半导体",
            "position": "FPGA开发",
            "duration": "2019\/07-2025\/04",
            "description": "1,FPGA算法实现;ASIC算法实现;2,数字电路系统的微架构设计;3,仿真,验证;"
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            "name": "泛智屏",
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        },
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            "name": "精密仪器",
            "role": "Verilog实现",
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        },
        {
            "name": "传感器",
            "role": "Verilog实现",
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        },
        {
            "name": "4G\/5G",
            "role": "Verilog实现",
            "duration": "2022\/12-2023\/07",
            "description": "主要涉及 PHY 的基本模块开发,其功能与目标保密。(1)负责模块的详细文档设计,代码实现,覆盖率分析,综合优化,低功耗分析等工作;(2)调研双调排序算法,对信道参数的排序算法进行优化,减少计算时延;"
        },
        {
            "name": "5G加速器",
            "role": "Verilog实现",
            "duration": "2021\/03-2022\/11",
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        },
        {
            "name": "4G通信设备",
            "role": "Verilog实现",
            "duration": "2019\/07-2021\/03",
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            "duration": "2016\/09-2019\/05",
            "description": "数采与数传项目。(1) ADC\/DAC芯片的性能调试和接口设计;(2) 正交下变频+拟合功率谱+信道能量检测;(3) 高速数据传输与存储(PCIE+DDR);(4) 算法研究;工作亮点:主动承担GTX通信接口的设计工作,发现并解决时钟芯片的工作异常,并利用IBERT完成硬件检测。"
        }
    ],
    "certifications": [
        "英语六级",
        "计算机二级C"
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    "self_evaluation": ""
}
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创建时间 created_at
2026-10-17 14:21:44