简历解析详情

ID id

1288

请求 ID request_id

1-6ad71934-151bce-fb0e539b70b8

解析时间 parsed_at

2026-10-20 07:33:10

source_bucket source_bucket

langbowei-static

源对象 source_object

resumes/1-6ad71934-151bce-fb0e539b70b8__widget_1704704635359_0.pdf

对象大小 object_size

152101

文件类型 file_type

pdf

姓名 name

郭先生

手机号 phone

18565680829

event_name event_name

ObjectCreated:PutObject

event_time event_time

2026-10-20T07:33:08.000Z

region region

cn-hangzhou

etag etag

DFDC90336C79427A81DA4AFCF16E0ACB

文本长度 text_length

1825

parsed_result parsed_result

JSON

{
    "basic_info": {
        "name": "郭先生",
        "gender": "男",
        "phone": "18565680829",
        "email": "1278627602@qq.com",
        "age": "34",
        "birth_date": null,
        "location": "深圳-南山区",
        "work_years": "11.3"
    },
    "education": [
        {
            "school": "河南农业大学",
            "major": "电子信息科学与技术",
            "degree": "本科",
            "graduation_year": "2015\/06"
        }
    ],
    "job_intention": {
        "expected_position": "FPGA工程师",
        "expected_salary": "40-60k×14薪",
        "expected_city": "深圳-南山区",
        "availability": null
    },
    "skills": [
        "verilog",
        "vivado",
        "vhdl",
        "ise",
        "万用表",
        "示波器",
        "图像视频处理",
        "ISP",
        "HDMI",
        "MIPI",
        "DP",
        "SDI",
        "LVDS",
        "USB3.0",
        "5G\/10G以太网",
        "GTX\/GTH SERDES",
        "DDR3",
        "I2C",
        "SPI",
        "UART",
        "ZYNQ",
        "xilinx",
        "altera",
        "lattice"
    ],
    "work_experience": [
        {
            "company": "深圳光峰科技股份有限公司",
            "position": "高级FPGA工程师",
            "duration": "2024\/06-Present",
            "description": "职责1：FPGA逻辑开发以及仿真等代码功能完善交付。职责2：FPGA重要技术理论论证与验证，并输出完善的文档记录。职责3：与相关人员协同合作处理夸部门任务。完成LED发送卡FPGA设计，包含12路5G以太网接口设计，DDR接口设计以及图像数据的缓存，图像缩放算法开发等图像处理。"
        },
        {
            "company": "深圳市康维讯视频科技有限公司",
            "position": "FPGA工程师",
            "duration": "2020\/03-2024\/06",
            "description": "职责1.FPGA逻辑设计和代码开发 职责2.FPGA硬件设计规划 职责3.FPGA技术文档的整理 职责4.跨部门沟通及相关设计实现。完成小尺寸广电专业显示器开发，实现 SDI\/HDMI等高速视频的显示。其中涉及到 DDR3缓存，图像旋转，3D LUT图像校正等图像处理。"
        },
        {
            "company": "深圳市中帝威科技有限公司",
            "position": "FPGA工程师",
            "duration": "2015\/06-2020\/03",
            "description": "职责1.FPGA逻辑设计及代码开发 职责2.FPGA硬件设计规划 职责3.FPGA相关技术文档编写存档。完成SDI转换器，SDI矩阵，USB3.0采集卡，以及其他定制化产品。设计到 SDI\/HDMI\/DP\/MIPI\/USB3.0\/LVDS等高速视频接口开发，以及相关的视频图像处理技术。"
        }
    ],
    "project_experience": [
        {
            "name": "LED发送卡FPGA设计",
            "role": "高级FPGA工程师",
            "duration": "2024\/06-Present",
            "description": "包含12路5G以太网接口设计，DDR接口设计以及图像数据的缓存，图像缩放算法开发等图像处理。"
        },
        {
            "name": "小尺寸广电专业显示器开发",
            "role": "FPGA工程师",
            "duration": "2020\/03-2024\/06",
            "description": "实现 SDI\/HDMI等高速视频的显示。其中涉及到 DDR3缓存，图像旋转，3D LUT图像校正等图像处理。"
        },
        {
            "name": "SDI转换器\/SDI矩阵\/USB3.0采集卡开发",
            "role": "FPGA工程师",
            "duration": "2015\/06-2020\/03",
            "description": "完成SDI转换器，SDI矩阵，USB3.0采集卡，以及其他定制化产品。设计到 SDI\/HDMI\/DP\/MIPI\/USB3.0\/LVDS等高速视频接口开发，以及相关的视频图像处理技术。"
        }
    ],
    "certifications": [],
    "self_evaluation": "1. 图像视频处理，ISP相关处理 ；\n2. 高速视频接口，HDMI，MIPI，DP，SDI，LVDS，USB3.0，5G\/10G以太网；GTX\/GTH SERDES接口；\n3. 高速DDR3存储接口；\n4. 音视频行业，LED控制器，专业显示器 ；\n5. 常用I2C，SPI，UART等接口；\n6. ZYNQ嵌入式开发；\n7. xilinx, altera, lattice等fpga开发工具"
}

output_key output_key

parsed/resumes/1-6ad71934-151bce-fb0e539b70b8__widget_1704704635359_0.pdf.parsed.json

状态 status

success

error_message error_message

无数据

raw_event raw_event

JSON

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            "eventVersion": "1.0",
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                    "name": "langbowei-static",
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            "region": "cn-hangzhou",
            "requestParameters": {
                "sourceIPAddress": "172.16.0.125"
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            "responseElements": {
                "requestId": "6AD719340CA2253530481A94"
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创建时间 created_at

2026-10-20 15:34:28

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