简历解析详情

简历解析 #629

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请求 ID
1-6a72aeee-15198b-b4ace0228840
状态
success
创建时间
2026-08-05 11:35:10
ID id
629
请求 ID request_id
1-6a72aeee-15198b-b4ace0228840
解析时间 parsed_at
2026-08-05 03:33:04
source_bucket source_bucket
langbowei-static
源对象 source_object
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对象大小 object_size
207396
文件类型 file_type
pdf
姓名 name
程长红
手机号 phone
15517100550
event_name event_name
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event_time event_time
2026-08-05T03:33:02.000Z
region region
cn-hangzhou
etag etag
A052F1144432B0FB295CA1B3ED75506E
文本长度 text_length
2968
parsed_result parsed_result
JSON
{
    "basic_info": {
        "name": "程长红",
        "gender": "男",
        "phone": "15517100550",
        "email": "chengchanghong_hw@163.com",
        "age": null,
        "birth_date": "1991\/05",
        "location": null,
        "work_years": 10.2
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    "education": [
        {
            "school": "河南理工大学",
            "major": "通信工程",
            "degree": null,
            "graduation_year": null
        }
    ],
    "job_intention": {
        "expected_position": "FPGA开发工程师\/FPGA原型验证工程师\/FPGA应用工程师",
        "expected_salary": null,
        "expected_city": null,
        "availability": null
    },
    "skills": [
        "Verilog",
        "SystemVerilog",
        "tcl脚本",
        "SQL",
        "C++",
        "Altera\/Xilinx7系列(ZYNQ、V7、K7、A7)",
        "VU9P",
        "VU13P",
        "QuartusⅡ",
        "Vivado",
        "UVM",
        "ModelSim",
        "MATLAB",
        "Linux",
        "SPI",
        "I2C",
        "UART",
        "RS442\/485",
        "DVI",
        "HDMI",
        "DP(eDP)",
        "数字信号处理",
        "视频图像处理算法",
        "ASIC代码移植FPGA",
        "RISC_CPU架构",
        "时序收敛",
        "DSP处理",
        "AXI总线协议",
        "PCIe协议",
        "以太网协议",
        "FC协议",
        "SRIO协议",
        "Aurora接口协议",
        "Arinc818接口协议",
        "Serdes高速接口",
        "DDR4\/DDR3接口",
        "RDMA",
        "GJB5000B规范"
    ],
    "work_experience": [
        {
            "company": "杭州天智融通科技有限公司",
            "position": "FPGA开发工程师",
            "duration": "2020\/12-2022\/02",
            "description": "参与超短波卫星信号接收机项目,配合组长设计完成整体架构搭建,分模块进行代码编写、仿真及调试工作;配合甲方进行交付联调实验,熟悉项目交付流程。"
        },
        {
            "company": "南京全信传输股份科技有限公司",
            "position": "FPGA开发工程师及项目负责人",
            "duration": "2022\/02-Present",
            "description": "负责军品项目(视频传输处理板、系统接口处理板)、共性设计项目及国军标认证项目。确认立项需求及周期,跟进进度;担任FPGA逻辑开发设计和代码编写及验证调试;组织项目组成员过会进展及风险评估;任务分派及需求分解。"
        },
        {
            "company": "上海诺基亚贝尔股份有限公司",
            "position": "数据通信工程师",
            "duration": "2014\/03-2017\/09",
            "description": null
        },
        {
            "company": "杭州东信网络技术有限公司",
            "position": "数据通信工程师",
            "duration": "2017\/10-2020\/12",
            "description": "负责项目技术支持及网络规划;分析信令数据提升RSRP、SINR;日常全网指标和告警监控;跟踪KPI指标提升;负责重点公共场所节前保障;解决高话务量及VOLTE问题;核心网及端到端技术支持。"
        }
    ],
    "project_experience": [
        {
            "name": "超短波卫星信号接收机",
            "role": "FPGA开发工程师",
            "duration": "2020\/12-2022\/02",
            "description": "实现对接收信号的放大、下变频等功能,以及目标卫星下行信号频谱查看和参数识别能力。配合组长设计完成整体架构搭建,分模块进行代码编写、仿真及调试;配合甲方进行交付联调实验。"
        },
        {
            "name": "视频处理模块产品项目",
            "role": "FPGA开发工程师及项目负责人",
            "duration": "2022\/02-Present",
            "description": "包含IP核定制、HDMI与ARINC818接口转换、综控台显示、座舱显示和记录存储、视频源采集及协议转换、PCIe采集和图像数据备份、ARINC818与LVDS接口转换等多个子项目,满足客户视频处理及接口转换需求。"
        },
        {
            "name": "通用计算处理模块产品项目",
            "role": "FPGA开发工程师及项目负责人",
            "duration": "2022\/02-Present",
            "description": "包含FC光纤接口板、XX总线接口板、数据处理板、通用计算处理板。实现FC转千兆以太网、PCIe转SRIO、AURORA转chip2chip、多路AURORA\/SRIO接口通信、10G以太网、MiPiCSI-2接收、跨FPGA在线升级等功能。"
        },
        {
            "name": "共性设计项目",
            "role": "FPGA开发工程师及项目负责人",
            "duration": "2022\/02-Present",
            "description": "负责完成现有和预开发产品项目的通用技术进行统一化IP封装,为相关产品项目提供集成化共性库资源,缩短研发周期。"
        },
        {
            "name": "国军标认证项目",
            "role": "FPGA开发工程师及项目负责人",
            "duration": "2022\/02-Present",
            "description": "按照GJB5000B认证要求,负责完成年度认证评审工作,确保研制周期及开发阶段符合可编程逻辑软件的标准规范,保障公司顺利通过正评工作。"
        }
    ],
    "certifications": [
        "全国计算机等级水平二级",
        "华为LTE\/5G中级工程师认证",
        "中兴LTE中级工程师认证",
        "诺基亚LTE中\/高级工程师认证",
        "三维UG计算机辅助设计工程师认证"
    ],
    "self_evaluation": "具有项目管理能力,做事认真负责,学习能力和抗压能力强;具有良好的团队协作精神,善于沟通,能够适应加班和出差。"
}
output_key output_key
parsed/resumes/1-6a72aeee-15198b-b4ace0228840__widget_1704704635359_0.pdf.parsed.json
状态 status
success
error_message error_message
无数据
raw_event raw_event
JSON
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创建时间 created_at
2026-08-05 11:35:10