简历解析
#833
记录详情
1-6a8d0e71-15eb4d-d186c49c6982
success
2026-08-25 11:40:58
ID
id
833
请求 ID
request_id
1-6a8d0e71-15eb4d-d186c49c6982
解析时间
parsed_at
2026-08-25 03:39:33
source_bucket
source_bucket
langbowei-static
源对象
source_object
resumes/1-6a8d0e71-15eb4d-d186c49c6982__widget_1704704635359_0.pdf
对象大小
object_size
109156
文件类型
file_type
pdf
姓名
name
胡文瀚
手机号
phone
13767109056
event_name
event_name
ObjectCreated:PutObject
event_time
event_time
2026-08-25T03:39:30.000Z
region
region
cn-hangzhou
etag
etag
2AB2674AE5E2670C0DC459CE58C05DC0
文本长度
text_length
2332
parsed_result
parsed_result
JSON
{
"basic_info": {
"name": "胡文瀚",
"gender": null,
"phone": "13767109056",
"email": "wenhan_hu@163.com",
"age": null,
"birth_date": null,
"location": null,
"work_years": "2.4"
},
"education": [
{
"school": "伦敦大学学院",
"major": "电气与电子工程",
"degree": "硕士研究生",
"graduation_year": "2023\/12"
},
{
"school": "利物浦大学",
"major": "电气与电子工程",
"degree": "本科",
"graduation_year": "2021\/07"
},
{
"school": "西交利物浦大学",
"major": "电气工程及其自动化",
"degree": "本科",
"graduation_year": "2019\/07"
}
],
"job_intention": {
"expected_position": null,
"expected_salary": null,
"expected_city": null,
"availability": null
},
"skills": [
"Vivado (Xilinx UltraScale\/UltraScale+ 系列)",
"VCS",
"Verdi",
"SpyGlass",
"TCL",
"Python",
"IIC",
"SPI",
"UART",
"PCIe",
"千兆网 (GbE)",
"RMII",
"Verilog",
"逻辑设计与模块化架构划分",
"时序约束与收敛",
"跨die信号时序违例处理",
"资源使用优化",
"模块级单元测试",
"故障注入验证",
"回归测试"
],
"work_experience": [
{
"company": "新凯来集团",
"position": "研发工程师",
"duration": "2024\/01 - 2026\/05",
"description": "参与光学量测相位解算卡、高精对时同步卡等项目,负责核心模块RTL设计;熟悉IIC\/SPI\/UART\/PCIe\/千兆网\/RMII等接口并在项目中应用;具备VCS\/Verdi单元测试、SpyGlass静态检查、TCL\/Python自动化流程能力,以及跨die时序收敛与多时钟域数据链路经验,熟悉Xilinx UltraScale+(Vivado)全流程开发。主要工作包括:1. 通信接口:熟悉IIC、SPI、UART、PCIe、千兆网、RMII等协议,基于CBB高速接口完成业务对接与数据通路集成;2. 数据通路:设计数据帧格式,实现相位、DFX、原始ADC等数据组帧上送,全链路0丢包、上送时延<2µs;3. DFX与可靠性:开发故障树检测与DFX状态监控,处理跨die时序违例,完成多时钟域CDC与高可靠数据链路设计;4. 验证自动化:使用VCS\/Verdi做模块级单元测试与回归,SpyGlass做lint\/CDC检查,开发TCL\/Python版本生成与测试报告自动化流程。"
}
],
"project_experience": [
{
"name": "基于VU13P的光学量测相位解算卡FPGA开发",
"role": "FPGA逻辑开发",
"duration": "2024\/10 - 2026\/05",
"description": "项目背景:负责激光干涉仪解算卡FPGA开发,干涉信号经APD光电转换、AD9253采样后,由Xilinx VU13P FPGA实时解算相位,支撑工件台亚纳米级闭环定位,同时需将相位、监控与原始数据高速可靠上送。项目职责:1. 集成时钟复位、ADC采样、相位解算、PCIe、日志上送、伺服接收等模块,打通下发与上送完整链路;2. 实现相位数据组帧打包,构建sp调度通道以最高优先级通过PCIe的DMA通道快速上送,上送频率40kHz,链路时延<2µs;3. 开发AD7606状态监控功能并实现AD9253原始数据直传,全量收集DFX监控数据;4. 优化解算引擎资源使用,处理跨die时序违例,完成Vivado\/SpyGlass告警全量排查。项目成果:实现亚纳米级量测精度,支持20路传感器并行采集,原始数据最大支持8通道7.5s上送,单次最大数据吞吐约16GB;迭代交付10+个逻辑版本,AR需求120+,联调阶段闭环10+项信号链路问题,交付后连续稳定运行5个月无下游问题。"
},
{
"name": "基于KU040的高精对时同步卡的FPGA开发",
"role": "FPGA逻辑开发",
"duration": "2024\/01 - 2024\/10",
"description": "项目背景:负责UART IO子板FPGA逻辑开发。系统由主控板、控制堆底板和IO板组成,UART板基于Xilinx KU040 FPGA承担以太网级联路由、自定义Fieldx协议栈解析与组包,指令分发与业务数据汇聚。项目职责:1. 集成千兆以太网、RMII、UART等模块,开发自定义Fieldx协议栈解包和组包功能,打通11路串口数据下发与上送的完整链路;2. 开发SYNC脉宽解码对时模块,实现IO板与底板时间戳同步;3. 构建完备故障树检测体系,覆盖18种异常检测;4. 完成Vivado\/SpyGlass告警全量排查,代码覆盖率提升至100%。项目成果:硬件同步时延<100ns;故障定位由小时级缩短至分钟级,整体排查时间缩短一半以上;代码覆盖率由80%提升至100%,协助团队一次性通过TR5评审,交付后连续稳定运行5个月。"
}
],
"certifications": [],
"self_evaluation": ""
}
output_key
output_key
parsed/resumes/1-6a8d0e71-15eb4d-d186c49c6982__widget_1704704635359_0.pdf.parsed.json
状态
status
success
error_message
error_message
无数据
raw_event
raw_event
JSON
{
"events": [
{
"eventName": "ObjectCreated:PutObject",
"eventSource": "acs:oss",
"eventTime": "2026-08-25T03:39:30.000Z",
"eventVersion": "1.0",
"oss": {
"bucket": {
"arn": "acs:oss:cn-hangzhou:1748673497100614:langbowei-static",
"name": "langbowei-static",
"ownerIdentity": "1748673497100614",
"virtualBucket": ""
},
"object": {
"deltaSize": 109156,
"eTag": "2AB2674AE5E2670C0DC459CE58C05DC0",
"key": "resumes\/1-6a8d0e71-15eb4d-d186c49c6982__widget_1704704635359_0.pdf",
"objectMeta": {
"mimeType": "application\/pdf"
},
"size": 109156
},
"ossSchemaVersion": "1.0",
"ruleId": "6ace21aabfd5f4f41034504922b3ff7128aa76bb"
},
"region": "cn-hangzhou",
"requestParameters": {
"sourceIPAddress": "172.16.0.119"
},
"responseElements": {
"requestId": "6A8D0E72727C5233305BD60C"
},
"userIdentity": {
"principalId": "300034963247836315"
}
}
]
}
创建时间
created_at
2026-08-25 11:40:58