简历解析
#964
记录详情
1-6aa8ada0-15de1b-a57ac1e17922
success
2026-09-15 10:30:46
ID
id
964
请求 ID
request_id
1-6aa8ada0-15de1b-a57ac1e17922
解析时间
parsed_at
2026-09-15 02:29:55
source_bucket
source_bucket
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源对象
source_object
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对象大小
object_size
229852
文件类型
file_type
pdf
姓名
name
孙振栓
手机号
phone
15759797822
event_name
event_name
ObjectCreated:PutObject
event_time
event_time
2026-09-15T02:29:53.000Z
region
region
cn-hangzhou
etag
etag
1EE0691A077074E7990E311D365B6C69
文本长度
text_length
1722
parsed_result
parsed_result
JSON
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"basic_info": {
"name": "孙振栓",
"gender": "",
"phone": "15759797822",
"email": "724649614@qq.com",
"age": "",
"birth_date": "1995\/04",
"location": "",
"work_years": "3.6"
},
"education": [
{
"school": "闽南理工学院",
"major": "光电信息科学与工程",
"degree": "本科",
"graduation_year": "2018"
}
],
"job_intention": {
"expected_position": "数字IC验证",
"expected_salary": "",
"expected_city": "",
"availability": ""
},
"skills": [
"xilinxFPGA芯片",
"外围设备接口和驱动开发",
"GTH",
"IOSERDES",
"SPI",
"IIC",
"UART",
"USB",
"ADC",
"PWM",
"常用通讯协议",
"4G模块二次开发",
"OTA空中升级",
"UVM基本框架",
"System Verilog",
"Verilog",
"有限状态机",
"同步异步FIFO",
"ARM内核芯片开发"
],
"work_experience": [
{
"company": "无锡艾芯泽微电子科技有限公司(杰华特子公司)",
"position": "FPGA\/芯片设计",
"duration": "2024\/11 - Present",
"description": "数字芯片registercrcRTL开发,FPGAserdes开发。1.负责2GGTH及100MCDR开发,并成功到华为现场进行连通性测试通过。2.负责芯片registercrc开发,并成功交付流片。"
},
{
"company": "深圳市南北微电子科技有限公司",
"position": "数字芯片验证工程师",
"duration": "2022\/08 - 2024\/10",
"description": "规划数字芯片测试方案及完成验证与测试。1.基于LVDS和MIPI接口的验证与测试。2.对CSI2-MIPI提出优化流程设计,将功耗降低。"
},
{
"company": "广州优路加信息科技有限公司",
"position": "开发工程师",
"duration": "2021\/04 - 2022\/07",
"description": "规划产品硬件及软件需求,完成产品的开发与测试。1.基于ARM内核芯片开发低功耗智能定位产品。2.设计GPS定位模块。"
}
],
"project_experience": [
{
"name": "SERDES2G+100M底层设计与开发",
"role": "",
"duration": "",
"description": "开发SERDESGTHIP,bypass8-10bit、数据对齐等电路,只保留PCS层进行数据回环测试。采用ioserdes原语输出差分线速率为100M,同样进行PRBS7数据回环测试。负责100M速率下8倍过采样CDR代码的开发。进行FPGAHSMT互联互通测试。"
},
{
"name": "BISTRegisterCRC的设计与验证",
"role": "",
"duration": "",
"description": "对标竞品BISTregCRC功能,初步评估出触发条件及内建自测试需求。编写单点及周期性触发功能和内建自测试RTL,加入DFX寄存器。编写testplan,搭建UVM环境进行验证。在已有awk寄存器脚本基础上加入BISTregCRC功能,并review。综合后,在FPGA进行上板测试。"
},
{
"name": "基于LVDS和MIPI接口的图像传感器验证",
"role": "",
"duration": "",
"description": "编写testplan,分解测试点,编写testcase。编写dut的driver,编写LVDS和CSI2-MIPI接口的monitor,加入referencemodel,实现自动数据对比。对比后的数据及波形进行分析,协助DUT设计师优化与迭代LVDS和MIPI接口。"
}
],
"certifications": [
"CET-4",
"机动车驾驶证",
"计算机二级证书"
],
"self_evaluation": ""
}
output_key
output_key
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状态
status
success
error_message
error_message
无数据
raw_event
raw_event
JSON
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创建时间
created_at
2026-09-15 10:30:46