简历解析详情

简历解析 #976

记录详情

返回列表
请求 ID
1-6aaa9bb7-15c32e-52071e2c4496
状态
success
创建时间
2026-09-16 21:41:22
ID id
976
请求 ID request_id
1-6aaa9bb7-15c32e-52071e2c4496
解析时间 parsed_at
2026-09-16 13:38:09
source_bucket source_bucket
langbowei-static
源对象 source_object
resumes/1-6aaa9bb7-15c32e-52071e2c4496__widget_1704704635359_merged.png
对象大小 object_size
491176
文件类型 file_type
png
姓名 name
席鹏
手机号 phone
event_name event_name
ObjectCreated:PutObject
event_time event_time
2026-09-16T13:38:07.000Z
region region
cn-hangzhou
etag etag
A0BB0F58E89E7892B5DF79893EB0C457
文本长度 text_length
2890
parsed_result parsed_result
JSON
{
    "basic_info": {
        "name": "席鹏",
        "gender": "",
        "phone": "",
        "email": "",
        "age": "31",
        "birth_date": "",
        "location": "",
        "work_years": "4.0"
    },
    "education": [
        {
            "school": "西华大学",
            "major": "微电子科学与工程",
            "degree": "本科",
            "graduation_year": "2018"
        }
    ],
    "job_intention": {
        "expected_position": "FPGA开发",
        "expected_salary": "20-25K",
        "expected_city": "深圳",
        "availability": "随时到岗"
    },
    "skills": [
        "Vivado",
        "ISE",
        "Quartus",
        "ModelSim",
        "EDA",
        "SPI",
        "UART",
        "RS232",
        "PCIe",
        "AXI4",
        "Verilog",
        "RTL设计",
        "C语言",
        "嵌入式软件开发",
        "Protel",
        "AD",
        "ARM开发",
        "Linux驱动",
        "Petalinux",
        "DDR3",
        "DDR4",
        "GTX",
        "SDI_IP",
        "BT1120",
        "DCP",
        "Microblaze",
        "DMA",
        "Ethernet",
        "EtherCAT",
        "Profinet",
        "GigE Vision",
        "UDP",
        "MAC",
        "ICMP",
        "ARP",
        "DPC",
        "BLC",
        "ISP",
        "中值滤波",
        "均值滤波",
        "高斯滤波",
        "PCI_CH365",
        "AD7606",
        "74HC595",
        "ADC",
        "DDS",
        "AXI-HP",
        "NVME",
        "LVDS",
        "TCP",
        "RGMII",
        "ISERDES3",
        "IDELAV3"
    ],
    "work_experience": [
        {
            "company": "四川同意未来科技有限公司",
            "position": "FPGA开发",
            "duration": "2024\/10 - 2025\/05",
            "description": "负责实时图像采集去雾板卡项目,主要负责dcp算法的实现,对dcp算法拆解后分为A值估计、粗透射率估计、导向滤波、图像去雾等模块。其中导向滤波采用29*29尺寸的滤波器窗口,fp16类型。两路视频数据复用一个DCP算法模块,ddr的仲裁调度在microblaze中完成。"
        },
        {
            "company": "海伯森技术(深圳)有限公司",
            "position": "FPGA开发",
            "duration": "2023\/07 - 2024\/05",
            "description": "1. 离线光谱共焦传感器:高速面阵CMOS采集,DMA控制DDR4缓存,支持4ROI。使用Zynq PS端LWIP实现UDP千兆网PS,PL大数据交互。2. 在线点光谱维护:使用GigE Vision相机进行图像采集,支持2路千兆PHY通讯。3. PCIe数据采集:实现PCIe和XDMA数据传输。4. UDP千兆以太网:MAC层、UDP层、IP层、ICMP和ARP层采用RTL代码设计。5. 图像算法:包括DPC、BLC、ISP算法以及中值滤波、均值滤波和高斯滤波等。"
        },
        {
            "company": "成都世仰科技有限公司",
            "position": "FPGA开发",
            "duration": "2022\/06 - 2023\/05",
            "description": "1. 多功能采集卡:fpga端设计PCI_CH365接口和自定义寄存器,通过spi控制adc产生2路DDS信号,用ad7606和74HC595产生16路adc采集通道,16路模拟量输出,8路模拟量输入\/输出开关,通过pci接口与工控机通讯。2. 微型雷达采集系统:PL端通过采样率250MSPS双通道ADC采集信号,滤波组帧后通过AXI-HP发送到PS端。PS端制作Petalinux系统支持nvme和北斗通信模块驱动,挂载NVME M2 SSD,将雷达信号写入ssd。"
        },
        {
            "company": "成都国新思创",
            "position": "FPGA开发",
            "duration": "2021\/05 - 2022\/04",
            "description": "参与频率源、接收机、双通道16g数字采样项目。频率源中通过fpga对DDS、小数分频器等器件进行verilog代码设计,实现30M-6G频率输出。接收机项目中对1本征、2本征控制关系写出rtl代码,联合硬件调试人员调通产品。"
        },
        {
            "company": "海伯森技术有限公司",
            "position": "FPGA",
            "duration": "2023\/07 - 2024\/05",
            "description": "1. 离线光谱共焦传感器:负责PL端CMOS图像采集,DDR4缓存和PS端裸机控制到图像显示。通过SPI控制CMOS寄存器,iserdes3和idelav3进行LVDS接收对齐训练,帧时序控制,3帧缓存,坏点校正和blc算法,千兆网TCP传输。解决lvds数据接收对齐处理(温度补偿、自动bitslip、gearbox变速器1:12解串)。2. 在线点光谱维护:gige vision相机图像采集与rgmii接口上传,查找问题修改协议。"
        }
    ],
    "project_experience": [
        {
            "name": "实时图像采集去雾板卡",
            "role": "FPGA开发",
            "duration": "2024\/10 - 2025\/05",
            "description": "输入端口为两路3G-SDI,输出也是两路3G-SDI。两路SDI输入信号经过均衡器到GTX及SDI_IP核,BT1120解码后缓存到DDR3,经过DCP(暗通道先验去雾算法)后再输入DDR3,读出经BT1120编码输入到SDI_IP及GTX,转成sd输出。主要负责dcp算法实现,拆解为A值估计、粗透射率估计、导向滤波、图像去雾等模块。导向滤波采用29*29尺寸滤波器窗口,fp16类型。两路视频复用DCP模块,ddr仲裁调度在microblaze中完成。"
        },
        {
            "name": "离线光谱共焦传感器",
            "role": "FPGA开发",
            "duration": "2023\/07 - 2024\/05",
            "description": "用于高速工业传感器领域,通过高速面阵CMOS采集经DDR缓存传输到ps端以太网。使用XCZU3EG-2SFV784I芯片。PL端实现编码器控制、adc调光、LVDS接口、DDR4缓存、cmos初始化、模拟量输出、RS422\/RS485通讯。PS端实现linux实时操作系统、千兆网TCP传输、profinet和Ethercat。主要负责PL端CMOS图像采集、DDR4缓存和PS端裸机控制到图像显示。解决lvds数据接收对齐处理(温度补偿、自动bitslip、gearbox变速器1:12解串)。"
        },
        {
            "name": "在线点光谱维护",
            "role": "FPGA开发",
            "duration": "2023\/07 - 2024\/05",
            "description": "使用GigE Vision相机进行图像采集与rgmii接口上传,支持2路千兆PHY通讯。相机产品更新后出现bug,主要负责查找问题修改协议。"
        },
        {
            "name": "PCIe数据采集",
            "role": "FPGA开发",
            "duration": "2023\/07 - 2024\/05",
            "description": "实现PCIe和XDMA数据传输。"
        },
        {
            "name": "UDP千兆以太网",
            "role": "FPGA开发",
            "duration": "2023\/07 - 2024\/05",
            "description": "MAC层、UDP层、IP层、ICMP和ARP层采用RTL代码设计,实现高效的千兆以太网通讯。"
        },
        {
            "name": "图像算法",
            "role": "FPGA开发",
            "duration": "2023\/07 - 2024\/05",
            "description": "包括DPC、BLC、ISP算法以及中值滤波、均值滤波和高斯滤波等图像处理算法。"
        },
        {
            "name": "多功能采集卡",
            "role": "FPGA开发",
            "duration": "2022\/06 - 2023\/05",
            "description": "用于工业控制领域,工控机控制8张采集卡。使用Spartan6-XC6SLX16芯片,pci接口采用pci_ch365桥片。fpga端设计PCI_CH365接口和自定义寄存器,通过spi控制adc产生2路DDS信号,用ad7606和74HC595产生16路adc采集通道,16路模拟量输出,8路模拟量输入\/输出开关,通过pci接口与工控机通讯。"
        },
        {
            "name": "微型雷达采集系统",
            "role": "FPGA开发",
            "duration": "2022\/06 - 2023\/05",
            "description": "用于低空雷达SAR成像领域,高速ADC采集雷达前端信号存储到m2 SSD。使用XCZU9EG-2FFVB1156I芯片。PL端通过250MSPS双通道ADC采集信号,滤波组帧后通过AXI-HP发送到PS端。PS端制作Petalinux系统支持nvme和北斗通信驱动,挂载NVME M2 SSD,将雷达信号写入ssd。"
        },
        {
            "name": "频率源",
            "role": "FPGA开发",
            "duration": "2021\/05 - 2022\/04",
            "description": "通过fpga对DDS、小数分频器等器件进行verilog代码设计,实现30M-6G,步进为1Khz的频率输出。"
        },
        {
            "name": "接收机",
            "role": "FPGA开发",
            "duration": "2021\/05 - 2022\/04",
            "description": "包含短波、超短波和微波3种,采用高云fpga或spartan 6\/3等芯片。通过对1本征、2本征控制关系写出rtl代码,联合硬件调试人员调通产品。"
        },
        {
            "name": "双通道16g数字采样",
            "role": "Linux驱动开发",
            "duration": "2021\/05 - 2022\/04",
            "description": "只参与linux驱动部分。"
        }
    ],
    "certifications": [],
    "self_evaluation": ""
}
output_key output_key
parsed/resumes/1-6aaa9bb7-15c32e-52071e2c4496__widget_1704704635359_merged.png.parsed.json
状态 status
success
error_message error_message
无数据
raw_event raw_event
JSON
{
    "events": [
        {
            "eventName": "ObjectCreated:PutObject",
            "eventSource": "acs:oss",
            "eventTime": "2026-09-16T13:38:07.000Z",
            "eventVersion": "1.0",
            "oss": {
                "bucket": {
                    "arn": "acs:oss:cn-hangzhou:1748673497100614:langbowei-static",
                    "name": "langbowei-static",
                    "ownerIdentity": "1748673497100614",
                    "virtualBucket": ""
                },
                "object": {
                    "deltaSize": 491176,
                    "eTag": "A0BB0F58E89E7892B5DF79893EB0C457",
                    "key": "resumes\/1-6aaa9bb7-15c32e-52071e2c4496__widget_1704704635359_merged.png",
                    "objectMeta": {
                        "mimeType": "image\/png"
                    },
                    "size": 491176
                },
                "ossSchemaVersion": "1.0",
                "ruleId": "6ace21aabfd5f4f41034504922b3ff7128aa76bb"
            },
            "region": "cn-hangzhou",
            "requestParameters": {
                "sourceIPAddress": "172.16.0.128"
            },
            "responseElements": {
                "requestId": "6AAA9BBF04A21A3830B3E317"
            },
            "userIdentity": {
                "principalId": "300034963247836315"
            }
        }
    ]
}
创建时间 created_at
2026-09-16 21:41:22